Check out Robert’s Poker Site. • Check out the PencilGeek Poker Blog
Robert R. Collins
objective |
|
|
Challenging Management position responsible for firmware design and development. To build a world-class engineering organization responsible for System BIOS and system-related firmware and device drivers. |
Experience |
|
|
2002–Present NVIDIA
Corporation System BIOS Manager August 2002 – October 2005 n Managed
BIOS organization: 8 members in n Responsible for rating, ranking, performance and salary reviews. n Managed
relationships with BIOS AE team members in n Developed tutorial and training material. n Tutored and trained AE teams as necessary. n Managed
relationships with BIOS vendors in the n
Developed relationships with n Assisted with LinuxBIOS projects as necessary. n Negotiate contracts, pricing, and terms of BIOS Vendor contracts. n Responsible for scouting, recruiting, interviewing, and hiring BIOS staff as necessary. n Plan and budget staffing, equipment, and group activities. n Plan the design and implementation of reference BIOS products and design guidelines for use by customers and BIOS vendors. n Assist with customer development, productization, and deployment, for tier-1 customers, some tier-2 customers, and any other important customers as necessary. n Responsible
for developing and maintaining n Responsible for weekly reference BIOS releases. n
n
n
n Created weekly packaged release to customers containing all of the above components through the NVIDIA “OEM BIOS Support Drop” (OBSD). n Solely designed and implemented NVIDIA memory module reference code (NVMM). n
Revolutionary new design to work with any BIOS
vendor, any CPU, n This design reduced code size, increased maintainability, and substantially reduced the support role of NVIDIA AEs for NVIDIA chipsets. |
|
1996–2002 Transmeta Corporation Director of BIOS Engineering December 2001 – August 2002 n Managed BIOS organization: 1-Manager, 4-Principle Engineers, 1-Test Associate, 2-Taiwan-based Engineers. n Design and implement BIOS core code for new Transmeta chipsets. n Plan the design and implementation of reference BIOS products and design guidelines for use by customers and BIOS vendors. n Negotiate pricing and terms of BIOS Vendor contracts. n Developed and maintain relationships with BIOS vendors. n Plan and budget staffing, equipment, and group activities. n Guide career development for department members. n Manage BIOS testing, procedures, and releases.
n Plan, develop, and implement reference BIOS for BIOS vendors. n Plan, develop, implement, and maintain BIOS products for in-house reference platforms. n Develop and maintain BIOS source code for Transmeta reference platforms. n Assist with customer development, productization, and deployment, as necessary. n Project
engineering resources, development platforms, and equipment needs. Member of Technical Staff December 1996 – August 1998 n Design and implement design verification tests for x86-based microprocessor designs. n Characterize and document Intel x86 microprocessor behavior. n Design, implement, and maintain random test program generator programs for x86 microprocessor designs. |
|
1994–1996 Texas
Instruments Design Verification Manager December 1994 – December 1996 n Manage group of eight design verification engineers. Group responsible for designing and implementing design verification tests, and providing architectural knowledge of Intel x86-compatible processors. n Team leader for coordinating and tracking work between microprocessor design team, and design verification team; tracking microprocessor design bugs; coordinator for bug classification, tracking, and resolution. n Responsible
for teaching x86 assembly language design, programming techniques, and
debugging techniques to a wide variety of engineers. Design Verification Engineer n Solely characterized and documented all architectural details of Intel’s x86 processors: SMM; simultaneity of interrupts, lock cycle mechanics; and A20M#. n Jointly characterized “Appendix-H” Pentium features: 4 MB pages, and VME. n Designed and developed scores of design verification tests for System Management Mode (SMM), paging extensions (4 MB pages), and virtual mode extensions (VME). n Solely designed and implemented a self-contained and self-restarting operating system to run verification tests on silicon or emulation in a batch process, and without interaction. n Designed and implemented a software/hardware technique to assert various microprocessor signals under software control. |
|
1992 - 1994 Centigram
Communications Project Management: n Responsible for developing and tracking schedules of all disk drivers for SCSI, IDE, and firmware. n Responsible for allocating and tracking resources for disk driver sub-group. n Negotiated source code licensing agreement contracts. n Responsible
for evaluating and making personnel recommendations. Disk Device Drivers: n Solely responsible for designing and implementing disk device drivers for SCSI in a POSIX compliant (UNIX-like) distributed processing, Real-Time Operating System. n Solely
designed and implemented a complete SCSI device driver for a UNIX-like
operating system for the NCR 5380 SCSI controller, using the n Solely
designed and implemented a Firmware Experience: n Solely design and implement disk driver firmware to boot a primary or redundant SCSI disk. n Solely responsible for maintaining, enhancing, and releasing disk driver firmware for NCR 5380 SCSI controller. n Solely
responsible for designing and implementing an INT-13 interface for the above
firmware. 1989 - 1992 Acer
America Corporation Senior BIOS/Firmware Engineer August 1989 – May 1992 n Solely responsible for all facets of BIOS development: porting; design, implementation, new features; and debugging. Design and implement memory sizing and testing, cache sizing and testing; control functions for shadow RAM, FAST-A20, FAST-RESET, cache control, and CPU speed switching. n Solely responsible for supporting the hardware design engineers during the debug phase of new motherboards or new chipset computers. This support required using logic analyzers and In-Circuit-Emulators (ICE) for debugging purposes and to ensure that the BIOS and hardware works as designed. n Developed and tracked schedules for all System BIOS development, SCSI device drivers for DOS, EISA hardware debugger n Solely designed and implemented keyboard service routine (INT 09). n Participate in hardware design review meetings to discuss schematics, and all hardware and software related aspects in new computer designs and related periphery. n Solely responsible for designing and implementing high performance BIOS subroutines and interrupt service routines (ISR’s). The affect of these enhancements is a 3x speed improvement of the Power-On-Self-Test (POST). n Solely responsible for porting an expansion ROM to new hardware platforms. This expansion ROM is a self-contained debugger with all hardware initialization, testing, and debugging. The debugger is used via command line interface from RS-232 or video monitor. n Solely implement a SCSI device driver into the system BIOS in an IBM-PC compatible manner. The original code was supplied by Phoenix Technologies, but neither worked nor was 100% PC compatible. After the initial debugging, solely redesigned and implemented a new SCSI driver, and improved performance 660%. 1988 - 1989 Tandon Corporation BIOS Engineer September 1988 – August 1989 n Port system BIOS to new chipsets and hardware platforms for 80286 and 80386SX computers n Jointly design and solely implement power management features for 80286 and 80386SX laptop computers. n Solely design and implement screen switching capabilities for laptop computers that allowed the user to switch between internal and external screens without losing the data on the screen n Involved with timing, analysis, and implementation of various methods to take the 80286 from protected mode back to real mode -- including a method that doesn't require using the keyboard controller to RESET the CPU. n Solely responsible for maintaining hard disk overlay BIOS and producing production BIOS releases. BIOS conformed to standard INT-13 interface, with enhanced INT-13 functionality. |
Debugging Tools |
|||||||||||||||||
|
n In-Circuit Emulators: American Arium, Microtek; Intel ICE-486, ICD-486, ICE-386DX, ICE-386SX, ICE-286, I2ICE-286, and I2ICE-8086. n Analyzers: Adaptec and Ancot
SCSI Analyzers; Tektronix and HP Logic Analyzers; Various PCI, ISA, SM-BUS
Analyzers. |
||||||||||||||||
Patents |
|||||||||||||||||
|
|
||||||||||||||||
Publications |
|||||||||||||||||
|
|
||||||||||||||||
Education |
|||||||||||||||||
|
1979 – 1982 Golden
West College n Special Studies: Recording Arts, Electronics n 3.5 GPA 1980 – 1984 Orange
Coast College n Special Studies: Mathematics, Computer Science n 3.0 GPA |
||||||||||||||||
References |
|||||||||||||||||
|
n Will be made available upon request. |
fax (408) 779-1260 • e-mail rcollins@rcollins.org |
|